verilogをflymake

適当にさくっと作ってみた。

;; flymake settings for verilog mode
(defun flymake-verilog-init ()
  (let* ((temp (flymake-init-create-temp-buffer-copy 'flymake-create-temp-inplace))
         (local (file-relative-name temp (file-name-directory buffer-file-name))))
    (list "iverilog" (list "-tnull" local))))

;; iverilog error pattern
(add-to-list 'flymake-err-line-patterns
             '("\\(.*?\\):\\([0-9]+\\): \\(.*\\)$" 1 2 nil 3))

(add-hook 'verilog-mode-hook (lambda () (flymake-mode 1)))
(push '("\\.[v]\\'" flymake-verilog-init) flymake-allowed-file-name-masks)